Complete analysis of DRM plan of graphic display system


  1. Working principle and significance of PLANE
  2. Initialization and function of plan

0. Introduction

DRM PLANE_ The framebuffer receives the data, constructs the prototype of the displayed image, and sends the image to & DRM after clipping and scaling_ crtc.
In addition, through drm_plane_state to provide image rotation function.
KMS driver calls drm_universal_plane_init() initializes DRM PLANE. Each CRTC needs to define a primary plane and optional overlay plane and cursor plane.

The kernel code defines the plane type through a data structure of enumerated types.

enum drm_plane_type {

On September 21, 2016, Daniel Vetter will DRM_ The plane. C code was submitted to the kernel version 4.8.0 rc2. Before that, the common code related to the plane was located in DRM_ In CRTC. C.

Under the whole DRM diagram display architecture, the corresponding connection relationship of PLANE module is as follows
(picture from network):

1. Working principle and significance of plan

The target disk below is composed of 5 pictures in different positions. Finally, a picture with five colors is formed. This is the so-called layer concept in image processing.

Similarly, the plane in the graphic display system can also be understood as a layer. The images we see visually can be superimposed by multiple layers. The data of these layers come from different memory spaces, and finally synthesized by the graphic display processor and uniformly output to the display screen.

The following is a schematic diagram of multi-layer overlay:

  • Layer 1
    The primary plane provides a background pattern
  • Layer 2
    The overlay plane offers Penguin graphics
  • Layer 3
    cursor plane provides cursor patterns

Each layer can have different properties, such as:
Exynos through the data structure exynos_drm_plane_config to represent different plane attributes

struct exynos_drm_plane_config {
	  unsigned int zpos;
	  enum drm_plane_type type;
	  const uint32_t *pixel_formats;
	  unsigned int num_pixel_formats;
	  unsigned int capabilities;

The data of each layer comes from the framebuffer. Different image display data are stored in different fb. Relevant operations are carried out for the data source to realize image clipping, scaling, superposition and so on.

Clipping is realized by changing the W/H value of the graphic display data sent from the framebuffer;

Scaling is achieved by changing the W/H defined by plane and crtc;

Multi layer overlay specifies the location of graphic display data in crtc in plan

There are two main meanings of PLANE:

  • Enhance system flexibility
    For desktop systems, the display background pattern and mouse cursor are usually basic display elements and exist until the system is shut down. Therefore, the basic graph display output with less frequent changes can be realized by the general plane. The frequently changing graph display output is realized by a special plane.

  • Improve system performance
    Because plane has the functions of image scaling, clipping and multi-layer superposition, GPU can focus more on graphics rendering. This basic image processing is implemented by plane.

2. Initialization and function of plan

Before the plane is initialized, SoC vendors need to instantiate an exynos_ drm_ plane_ The data structure like config is used to describe the attributes of each album and the image formats supported by the plane. According to the previous description, exynos also supports three layers and can realize the superposition of three frames of images.

static const struct exynos_drm_plane_config
plane_configs[MIXER_WIN_NR] = {
			.zpos = 0,
			.pixel_formats = mixer_formats,
			.num_pixel_formats = ARRAY_SIZE(mixer_formats),
			.capabilities = EXYNOS_DRM_PLANE_CAP_DOUBLE |
			.zpos = 1,
			.pixel_formats = mixer_formats,
			.num_pixel_formats = ARRAY_SIZE(mixer_formats),
			.capabilities = EXYNOS_DRM_PLANE_CAP_DOUBLE |
			.zpos = 2,
			.pixel_formats = vp_formats,
			.num_pixel_formats = ARRAY_SIZE(vp_formats),
			.capabilities = EXYNOS_DRM_PLANE_CAP_SCALE |

The initialization process of the plane is as follows:

The following properties of the plane determine the position and zoom size of the image display. You can also set the property property value separately

		drm_object_attach_property(&plane->base, config->prop_fb_id, 0);
		drm_object_attach_property(&plane->base, config->prop_in_fence_fd, -1);
		drm_object_attach_property(&plane->base, config->prop_crtc_id, 0);
		drm_object_attach_property(&plane->base, config->prop_crtc_x, 0);
		drm_object_attach_property(&plane->base, config->prop_crtc_y, 0);
		drm_object_attach_property(&plane->base, config->prop_crtc_w, 0);
		drm_object_attach_property(&plane->base, config->prop_crtc_h, 0);
		drm_object_attach_property(&plane->base, config->prop_src_x, 0);
		drm_object_attach_property(&plane->base, config->prop_src_y, 0);
		drm_object_attach_property(&plane->base, config->prop_src_w, 0);
		drm_object_attach_property(&plane->base, config->prop_src_h, 0);

Plan parameters viewed by modetest:

id      crtc    fb      CRTC x,y        x,y     gamma size      possible crtcs
32      36      78      0,0             0,0     0               0x00000001
  formats: XR15 RG16 RG24 XR24 AR24
        7 type:
                flags: immutable enum
                enums: Overlay=0 Primary=1 Cursor=2
                value: 1
        16 FB_ID:
                flags: object
                value: 78
        17 IN_FENCE_FD:
                flags: signed range
                values: -1 2147483647
                value: -1
        19 CRTC_ID:
                flags: object
                value: 36
        12 CRTC_X:
                flags: signed range
                values: -2147483648 2147483647
                value: 0
        13 CRTC_Y:
                flags: signed range
                values: -2147483648 2147483647
                value: 0
        14 CRTC_W:
                flags: range
                values: 0 2147483647
                value: 800
        15 CRTC_H:
                flags: range
                values: 0 2147483647
                value: 600
        8 SRC_X:
                flags: range
                values: 0 4294967295
                value: 0
        9 SRC_Y:
                flags: range
                values: 0 4294967295
                value: 0
        10 SRC_W:
                flags: range
                values: 0 4294967295
                value: 52428800
        11 SRC_H:
                flags: range
                values: 0 4294967295
                value: 39321600
33      0       0       0,0             0,0     0               0x00000001

The display parameters corresponding to the plane attribute are as follows:

Verify the image output under DRM with modetest as follows:

echo 0xf > /sys/module/drm/parameters/debug

./tests/modetest/modetest -M vmwgfx -D 0 -a -s 34@36:1280x960  -P 32@36:1280x960 -Ftiles


After canceling the image output, view the log through dmesg, and only intercept the part containing the functions that PLANE should implement.


[  438.833181] [drm:drm_ioctl [drm]] pid=8888, dev=0xe200, auth=1, DRM_IOCTL_MODE_OBJ_GETPROPERTIES
[  438.833191] [drm:drm_ioctl [drm]] pid=8888, dev=0xe200, auth=1, DRM_IOCTL_MODE_GETPROPERTY
[  794.887990] [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:227] for plane state 0000000082b6801c
[  796.326527] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:32:plane-0] 00000000c67dc9f6 state to 000000006b70d79e

Tags: Linux gpu

Posted on Sun, 12 Sep 2021 22:33:20 -0400 by cheshil