1, Single bus protocol (1-wire)
1. Definition: the master and slave communicate with one bus, which is a half duplex communication mode. Single line = clock line + data line + control line (+ power line). Ideally, the number of slave devices on a bus is almost unlimited.
2. Features: This is a communication technology launched by Dallas Semiconductor Company. It adopts a single signal line, which can transmit both clock and data, and the data transmission is bidirectional.
3. Advantages: single bus technology has the advantages of simple circuit, less hardware overhead, low cost, convenient bus expansion and maintenance, etc.
2, Single bus communication process
All single bus devices require strict communication protocol to ensure data integrity. The protocol defines several signal types: reset pulse, reply pulse, write 0, write 1, read 0 and read 1. All these signals, except the reply pulse, are synchronized by the host. And all commands and data sent are the low order of bytes in front, which is different from most serial communication formats (most are the high order of bytes in front).
(1) Initialization sequence: reset and reply pulses
Initialization process = reset pulse + Slave response pulse.
The host generates a reset pulse by pulling down the single bus 480 ~ 960 us, and then releases the bus to enter the receiving mode. When the host releases the bus, it will produce a rising edge from low level to high level. After the single bus device detects the rising edge, it will delay 15 ~ 60 us, and the single bus device will pull down the bus 60 ~ 240 us to generate a response pulse. The host receives the response pulse from the slave, indicating that the single bus device is ready and the initialization process is completed.
The initialization sequence diagram is as follows:
(2) Write gap
There are two kinds of write gaps, including the time gap for writing 0 and the time gap for writing 1.
When the data line is pulled low, sample the data line within a time window of 15 ~ 60 us. If the data line is low, write 0. If the data line is high, write 1. To generate a write 1 time slot, the host must pull the data line low and allow the data line to be pulled high within 15 us after the start of the write time slot. To generate a write 0 time slot, the host must pull the data cable down and keep it for 60 us.
The write time slot sequence diagram is as follows:
(3) Read time gap
When the host pulls down the bus and releases the bus after holding at least 1 us, the data must be read within 15 us.
Single bus devices transmit data to the host only when the host sends a read time slot. Therefore, after the host sends a read data command, the read time slot must be generated immediately so that the slave can transmit data. All read time slots need at least 60us, and a recovery time of at least 1us is required between two independent read time slots. Each read time slot is initiated by the host and the bus is pulled down by at least 1us (as shown in Figure 5). After the host initiates the read slot, the single bus device starts to send 0 or 1 on the bus. If the slave sends 1, keep the bus high; If 0 is sent, pull down the bus. When sending 0, the slave releases the bus after the end of the time slot. Pull the bus back to the idle high state by the pull-up resistor. The data sent from the slave remains valid for 15us after the start of the time slot. Therefore, the host must release the bus during reading the time slot and sample the bus state within 15us after the start of the time slot.
The read time slot sequence diagram is as follows:
3, Single bus instance - DS18B20
When the host operates on a device of multiple DS18B20, the host first connects with the devices hung on the bus one by one, uses the search ROM(FOh) instruction to read out its serial number (33H), then sends the matching instruction (55h), and then provides the 64 bit serial number, and then operates the DS18B20.
If there is only one DS18B20 temperature measurement, there is no need to search ROM, read ROM and match Rom. only the instruction to skip ROM(CCh) instruction can command temperature conversion (44h) and read temperature (BEh) operation.
#include "ds18b20.h"
#include "delay.h"
//
//Experimental platform: STM32F103
//
//Reset DS18B20
void DS18B20_Rst(void)
{
DS18B20_IO_OUT(); //SET PG11 OUTPUT
DS18B20_DQ_OUT=0; //Pull down DQ
delay_us(750); //Pull down 750us
DS18B20_DQ_OUT=1; //DQ=1
delay_us(15); //15US
}
//Waiting for a response from DS18B20
//Return 1: the existence of DS18B20 is not detected
//Return 0: exists
u8 DS18B20_Check(void)
{
u8 retry=0;
DS18B20_IO_IN(); //SET PG11 INPUT
while (DS18B20_DQ_IN&&retry<200)
{
retry++;
delay_us(1);
};
if(retry>=200)return 1;
else retry=0;
while (!DS18B20_DQ_IN&&retry<240)
{
retry++;
delay_us(1);
};
if(retry>=240)return 1;
return 0;
}
//Read a bit from DS18B20
//Return value: 1 / 0
u8 DS18B20_Read_Bit(void)
{
u8 data;
DS18B20_IO_OUT(); //SET PG11 OUTPUT
DS18B20_DQ_OUT=0;
delay_us(2);
DS18B20_DQ_OUT=1;
DS18B20_IO_IN(); //SET PG11 INPUT
delay_us(12);
if(DS18B20_DQ_IN)data=1;
else data=0;
delay_us(50);
return data;
}
//Read a byte from DS18B20
//Return value: read data
u8 DS18B20_Read_Byte(void)
{
u8 i,j,dat;
dat=0;
for (i=1;i<=8;i++)
{
j=DS18B20_Read_Bit();
dat=(j<<7)|(dat>>1);
}
return dat;
}
//Write a byte to DS18B20
//dat: bytes to write
void DS18B20_Write_Byte(u8 dat)
{
u8 j;
u8 testb;
DS18B20_IO_OUT(); //SET PG11 OUTPUT;
for (j=1;j<=8;j++)
{
testb=dat&0x01;
dat=dat>>1;
if (testb)
{
DS18B20_DQ_OUT=0; // Write 1
delay_us(2);
DS18B20_DQ_OUT=1;
delay_us(60);
}
else
{
DS18B20_DQ_OUT=0; // Write 0
delay_us(60);
DS18B20_DQ_OUT=1;
delay_us(2);
}
}
}
//Start temperature conversion
void DS18B20_Start(void)
{
DS18B20_Rst();
DS18B20_Check();
DS18B20_Write_Byte(0xcc); // skip rom
DS18B20_Write_Byte(0x44); // convert
}
//Initialize the IO port DQ of DS18B20 and detect the existence of DS at the same time
//Return 1: does not exist
//Return 0: exists
u8 DS18B20_Init(void)
{
GPIO_InitTypeDef GPIO_InitStructure;
RCC_APB2PeriphClockCmd(RCC_APB2Periph_GPIOG, ENABLE); //Enable PORTG port clock
GPIO_InitStructure.GPIO_Pin = GPIO_Pin_11; //PORTG.11 push pull output
GPIO_InitStructure.GPIO_Mode = GPIO_Mode_Out_PP;
GPIO_InitStructure.GPIO_Speed = GPIO_Speed_50MHz;
GPIO_Init(GPIOG, &GPIO_InitStructure);
GPIO_SetBits(GPIOG,GPIO_Pin_11); //Output 1
DS18B20_Rst();
return DS18B20_Check();
}
//Get the temperature value from ds18b20
//Accuracy: 0.1C
//Return value: temperature value (- 550 ~ 1250)
short DS18B20_Get_Temp(void)
{
u8 temp;
u8 TL,TH;
short tem;
DS18B20_Start (); // ds1820 start convert
DS18B20_Rst();
DS18B20_Check();
DS18B20_Write_Byte(0xcc); // skip rom
DS18B20_Write_Byte(0xbe); // convert
TL=DS18B20_Read_Byte(); // LSB
TH=DS18B20_Read_Byte(); // MSB
if(TH>7)
{
TH=~TH;
TL=~TL;
temp=0; //The temperature is negative
}else temp=1; //The temperature is positive
tem=TH; //Get the top eight
tem<<=8;
tem+=TL; //Get the bottom eight
tem=(float)tem*0.625; //transformation
if(temp)return tem; //Return temperature value
else return -tem;
}
#ifndef __DS18B20_H
#define __DS18B20_H
#include "sys.h"
//
//
//IO direction setting
#define DS18B20_IO_IN() {GPIOG->CRH&=0XFFFF0FFF;GPIOG->CRH|=8<<12;}
#define DS18B20_IO_OUT() {GPIOG->CRH&=0XFFFF0FFF;GPIOG->CRH|=3<<12;}
IO Operation function
#define DS18B20_DQ_OUT PGout(11) / / data port PA0
#define DS18B20_ DQ_ In pgin (11) / / data port PA0
u8 DS18B20_Init(void);//Initialize DS18B20
short DS18B20_Get_Temp(void);//Get temperature
void DS18B20_Start(void);//Start temperature conversion
void DS18B20_Write_Byte(u8 dat);//Write a byte
u8 DS18B20_Read_Byte(void);//Read a byte
u8 DS18B20_Read_Bit(void);//Read one bit
u8 DS18B20_Check(void);//Detect the presence of DS18B20
void DS18B20_Rst(void);//Reset DS18B20
#endif
summary
Single bus technology has incomparable application prospects because of its advantages of simple circuit, less hardware overhead, low cost and simple software design. Based on single bus technology, it can better solve the common shortcomings of traditional recognizer, such as inconvenient carrying, easy damage, easy corruption, easy electromagnetic interference and so on. It can be applied to highly secure access control, identity recognition and other fields. Its communication is reliable, simple and easy to implement. Therefore, single bus technology has broad application prospects and is a development field worthy of production and attention.