[FPGA practice part 6] detailed principle explanation and function verification of four bit data selector, D trigger and shift register

1, Data selector 1. Detailed explanation of principle What is a data selector? According to the given input address code, the data selector selects a specified combinational logic circuit from a group of input signals to the output. Sometimes called a multiplexer or multiplexer. Basic definition of data selector In the process of multi- ...

Posted on Sun, 10 Oct 2021 01:28:11 -0400 by sandrine2411

FPGA design art (18) how to use arrays in Verilog to model memory?

preface The two-dimensional array in Verilog is very useful. You can use for and generate for together with the two-dimensional array to replace a large number of registers. In fact, a large number of similar registers can be replaced by memory. In Verilog, you can use the two-dimensional array to model the memory. What resources of FPGA make ...

Posted on Tue, 21 Sep 2021 07:20:07 -0400 by ThEMakeR

Trust me, SDRAM is really not difficult -- read operation (page burst mode)

1. Read operation          SDRAM provides a variety of data reading methods, such as single reading, page burst reading (burst length 1, 2, 4, 8, full page), etc. At present, this paper only explains and simulates the full page burst mode, and provides explanations and simulations of other writing method ...

Posted on Tue, 21 Sep 2021 01:25:59 -0400 by andre3