## A simple and convenient data splicing module (supports any bit width and any integer multiple)

Write in front          When writing the serial port diagram transmission project (using SDRAM cache), because the bit width of the write port of the SDRAM controller previously written is 16 bits, and the general serial port host computer can only send 8 bits at most, so the problem of inconsistent bit ...

Posted on Sun, 05 Dec 2021 02:28:42 -0500 by python_q

## (21)UVM virtual sequence

UVM virtual sequence In the previous section, we talked about hierarchical sequence. The next step is virtual sequence. How to distinguish between the virtual sequence and the hierarchical sequence? What they have in common is the coordination of each sequence. The difference between them is that the objects facing the hierarchical sequ ...

Posted on Sat, 20 Nov 2021 11:51:57 -0500 by robvan75

## Verilog Implemented Gray Code to Binary Code Conversion

1. What is Gray Code          Gray code is a cyclic binary code, or reflex binary code. Gray codes are characterized by a jump in only one data bit when changing from one number to an adjacent number. Because of this feature, metastable states in binary coded count combinational circuits can be avoided. ...

Posted on Wed, 03 Nov 2021 12:05:27 -0400 by spellbinder

## cmos pixel signal multichannel cache output IP module of FPGA practical project

Recently, I am working on cmos industrial camera. For some cmos chips, such as linear array cameras, pixel data of multiple channels will be output at the same time. However, in our actual use, these data are often written into the cpu memory in a serial way, and then processed in the next step. In this way, the pixel signals output by cmos nee ...

Posted on Thu, 21 Oct 2021 20:59:15 -0400 by RiZ

## [FPGA practice part 6] detailed principle explanation and function verification of four bit data selector, D trigger and shift register

1, Data selector 1. Detailed explanation of principle What is a data selector? According to the given input address code, the data selector selects a specified combinational logic circuit from a group of input signals to the output. Sometimes called a multiplexer or multiplexer. Basic definition of data selector In the process of multi- ...

Posted on Sun, 10 Oct 2021 01:28:11 -0400 by sandrine2411

## Trust me, SDRAM is really not difficult -- read operation (page burst mode)

1. Read operation          SDRAM provides a variety of data reading methods, such as single reading, page burst reading (burst length 1, 2, 4, 8, full page), etc. At present, this paper only explains and simulates the full page burst mode, and provides explanations and simulations of other writing method ...

Posted on Tue, 21 Sep 2021 01:25:59 -0400 by andre3

## Simulation of alarm mode control for Proteus sensor + gas concentration detection

catalog Simulation of alarm mode control for Proteus sensor + gas concentration detection 1 understanding of experimental significance 2 main experimental devices 3 experimental reference circuit 4. Problems in the experiment 4.1 fans for turning 4.2 control part 5 experiment refer ...

Posted on Thu, 25 Jun 2020 21:57:40 -0400 by DJ_CARO

## Verilog design example software anti shake design of key anti shake

Blog directory Write in front text Background introduction and review Single button Other design versions of single button Multiple buttons Write at the end reference material Make a friend Write in front Personal WeChat official account: FPGA LAB Home page of personal blog Note: learn to co ...

Posted on Fri, 19 Jun 2020 06:11:23 -0400 by rock_xl1

## ODDR of FPGA Xilinx primitive call

Record background: Recently, you need to call the ODDR primitive because you want to implement GMI to rgmii. ODDR: Dedicated Dual Data Rate (DDR) Output Register Through ODDR, the two channels of single end data are combined into one channel for output, the upper and lower edges output data at the same time, and the upper edge outputs a channel ...

Posted on Fri, 03 Apr 2020 18:05:44 -0400 by Secondlaw

## FPGA implementation of correlation filter tracking algorithm 1

1 Overview At present, many embedded devices need to use target tracking applications, such as missiles (infrared guidance), UAVs (follow shooting), etc., but in view of the small size of embedded devices, low energy consumption, and small computing power, it is necessary to select an appropriate al ...

Posted on Sun, 15 Mar 2020 01:29:09 -0400 by able